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Why HDI PCB Manufacturing Starts Long Before the First Hole Is Drilled

Why HDI PCB Manufacturing Starts Long Before the First Hole Is Drilled When people think about PCB manufacturing, they usually imagine drilling, plating, imaging, etching, solder mask, and surface finishing. For conventional PCBs, that assumption isn't too far from reality. For HDI (High Density Interconnect) PCBs, however, manufacturing actually begins long before any physical production starts. The success of an HDI project is often determined during engineering review rather than on the factory floor. Manufacturing Starts with Design Decisions A PCB layout may pass every design rule check inside CAD software while still being difficult to manufacture efficiently. Typical examples include: unnecessary stacked microvias excessive sequential lamination extremely aggressive trace and space dimensions unrealistic copper balancing inefficient stack-up planning None of these issues are fabrication defects. They are engineering decisions. The earlier they are identified, the lower the overall project cost becomes. The Stack-Up Is More Important Than Many Engineers Expect One of the biggest misconceptions is that increasing the layer count automatically solves routing problems. In reality, a carefully planned stack-up usually provides greater benefits than simply adding more copper layers. A good stack-up improves: signal integrity impedance consistency EMI performance power distribution thermal behavior More importantly, it creates a PCB that is easier to manufacture repeatedly with stable quality. HDI Is a Balance Between Performance and Manufacturability Many first-time HDI designs focus only on routing density. Experienced engineers usually focus on manufacturability. For example: Should this microvia really be stacked? Can staggered vias achieve the same result? Is another lamination cycle actually necessary? Can the BGA fan-out be optimized differently? Each decision influences fabrication complexity, yield, lead time, and production cost. Why DFM Matters More for H

2026-07-08 原文 →
AI 资讯

The 555 Timer: The Most Popular Chip Ever Made

Ask a room full of engineers to name the most popular integrated circuit ever made and you will hear guesses about famous microprocessors or memory chips. The real answer is far humbler: an eight-pin timer chip designed in 1971 that is still manufactured by the billion every single year. It is the 555 timer , and more than half a century after its debut it remains one of the first chips a student wires up and one of the last a veteran gives up on. A chip designed by one engineer The 555 was designed by Swiss-born engineer Hans Camenzind , working under contract to Signetics , and it reached the market in 1972. What made it remarkable was not raw speed or complexity but flexibility. Inside its tiny package sit a couple of dozen transistors, a handful of resistors, and two voltage comparators arranged around a simple voltage divider. Feed it a supply voltage, add one or two external resistors and a capacitor, and it will generate precise time delays and oscillations without any software at all. That analog-first design philosophy is exactly why it endured. By some estimates the 555 has been produced at a rate of around a billion units a year for decades, which comfortably earns it the title of probably the most popular IC ever made. It has flown on spacecraft, blinked in toys, and sat quietly on countless hobbyist breadboards. What the 555 actually does The 555 has three classic operating modes, and understanding them covers most of what you will ever need: Monostable — one stable state. A trigger produces a single output pulse of a fixed length set by an external resistor and capacitor. Think of a debounced button press or a timed relay. Astable — no stable state. The output oscillates continuously between high and low, producing a square wave. This is your blinking LED, your simple tone generator, or a rough clock source. Bistable — a basic flip-flop that latches between two states, useful as a simple set/reset memory element. None of this requires firmware, a cryst

2026-07-07 原文 →
开发者

How a Hollywood Star Helped Invent Wi-Fi

One of the most important ideas in modern wireless communication did not come out of a corporate research lab or a defense contractor. It was patented in 1942 by one of the most famous movie stars of the era, working alongside an avant-garde composer. The actress was Hedy Lamarr, and the technique she helped invent, frequency hopping , is a direct ancestor of the Wi-Fi, Bluetooth, and GPS signals your devices rely on every day. The patent Hollywood forgot At the height of her Hollywood fame, Hedy Lamarr was also a self-taught inventor who tinkered between film shoots. Early in World War II she became fixed on a hard problem: radio-controlled torpedoes were easy to jam, because an enemy who found the single control frequency could simply drown it in noise and send the weapon off course. Working with composer George Antheil, she designed a system where the transmitter and receiver would rapidly and secretly switch together across many different frequencies. Antheil, who had once synchronized sixteen player pianos for a concert piece, suggested using a slotted paper roll like a player piano to keep both ends hopping in step across 88 frequencies , the same number as the keys on a piano. On August 11, 1942, they received U.S. Patent 2,292,387 for a "Secret Communication System." The U.S. Navy filed the idea away and did not use it during the war. For decades the patent sat largely forgotten, and Lamarr received no money and little recognition for it in her lifetime. She was finally inducted into the National Inventors Hall of Fame in 2014, years after her death. What frequency hopping actually does The core insight is deceptively simple. Instead of putting a signal on one fixed frequency, you spread it across many frequencies in a pattern that only the sender and receiver know. Both ends "hop" in perfect synchronization, dwelling on each frequency for only a fraction of a second before jumping to the next. This buys you two enormous advantages. It is very hard to jam, b

2026-07-06 原文 →
产品设计

Why IoT Modules Still Use 1981 AT Commands

If you have ever wired up a cellular modem, a WiFi module, or a Bluetooth radio and typed something like AT+CGMR into a serial terminal, you have used a command language that is older than most of the engineers using it. The humble AT command set that still configures a huge share of today's connected hardware was born in 1981 , with a device called the Hayes Smartmodem. Four decades and billions of devices later, it refuses to die, and that longevity has a lesson in it for anyone building embedded systems. What AT actually stands for When Dennis Hayes and his company released the Hayes Smartmodem 300 in 1981, they faced a small but real design problem: how does a computer tell a modem the difference between a command to the modem and data to be sent down the phone line ? Their answer was an attention sequence. Every command line began with the two letters AT , short for attention , which told the modem to wake up and listen to what followed. ATD dialled a number, ATH hung up, and so on. It was readable, it was easy to implement on the microcontrollers of the day, and crucially you could type it by hand to debug a link. That simplicity is exactly why it spread. Competing modem makers cloned the Hayes command set to stay compatible, it became a de facto industry standard, and later it was formally captured in telecom standards. A convention that started as one company's pragmatic shortcut turned into the lingua franca of getting a device onto a network. From phone lines to the Internet of Things Here is the part that surprises people. The AT command set never retired when dial-up modems did. It quietly migrated into the components that make modern IoT possible. Cellular modules that put a device on a 4G or LTE network, from vendors like Quectel, SIMCom, and u-blox, are almost universally driven by AT commands. Classic Bluetooth and many WiFi modules expose an AT interface too. Even the ESP8266 and ESP32, the microcontrollers behind an enormous number of hobby and com

2026-07-05 原文 →
AI 资讯

💿 The Death of the Disc: Why Sony's 2028 Digital Monopolisation Was Inevitable

Sony shared an announcement with the console market: physical disc production for all PlayStation games will completely stop in January 2028. You can read the official announcement on the PlayStation Blog . From a pure engineering perspective, modern internet infrastructure has rendered physical distribution redundant. We no longer need plastic circles to transport megabytes. The gamer community response isn't about data transfer speeds. It is over true digital ownership, consumer rights, and software preservation. In this article, we break down the details, look at the history leading to this moment and explore why console makers would pursue this direction. 🔍 The Announcement Break Down The 2028 Deadline: The mandate strictly applies to new games launching after January 1, 2028. Legacy Back Catalog: Discs pressed before this date will still function (assuming future hardware maintains optical drive compatibility). "Code-in-a-Box" Retail: Stores will still sell physical cases on shelves, but they will contain a paper download voucher instead of a disc. I am no sustanability poster boy, seems wasteful to preserve retail shelf presence. 🛑 The Illusion of Ownership: "Buying" vs. "Renting" When you hit "Buy" on a digital storefront, you aren't purchasing a game. You are purchasing a conditional license to stream or download it—a long-term rental agreement that can be unilaterally altered or revoked. No Secondary Market: Players completely lose the ability to resell, trade, or lend games to friends. Monopoly Pricing: Eliminating discs removes competitive pricing from retailers like GameStop, JB Hi-Fi, or Amazon, leaving users locked to a single proprietary storefront. Delisting Vulnerability: If a publisher loses IP rights, the software vanishes instantly. 🎮 Case Study: My Close Call with Digital Erasure Look no further than Star Trek: Resurgence for proof of how fragile digital stores are. In April 2026, the publishers suddenly lost their IP distribution rights. Within

2026-07-04 原文 →
AI 资讯

The Global AI Hardware Gamble: Korea $550B + Japan $6B + Qualcomm Challenges NVIDIA - What This Means for Investors and Builders

Over the past week, the AI hardware news I've been tracking adds up to more than $610 billion in capital deployed globally — in just seven days. Not valuations. Not market cap. Actual capital expenditure commitments. Korea $550B, Japan $6B, Qualcomm's new accelerator, Kawasaki Heavy Industries' $1B AI infrastructure bond — this round of moves has already surpassed the wildest half-year of the 2000 dot-com bubble in scale. But this time the money isn't flowing into web pages. It's flowing into chips, memory, and power. Watching all of this over the past few days, I've been thinking: for investors and for builders like us making products on top of AI, what does this gamble actually mean? The Real Story Behind AI Training Bottlenecks: From GPU Scarcity → Memory Scarcity → Power Scarcity Honestly, everyone watches AI through the lens of models, but the real bottleneck was never the models — it's been the hardware. From 2023 to 2025, the bottleneck shifted from GPU scarcity to memory scarcity, and is now pushing toward power scarcity. When GPUs were tight, everyone scrambled for H100s and NVIDIA raked it in — but the part that actually throttled the H100 wasn't the GPU core, it was the HBM high-bandwidth memory. On the B200, the HBM3E stacked on top has its capacity locked up entirely by NVIDIA at SK Hynix, while Samsung is chasing hard but its yields can't keep up. That's why South Korea just committed $518B to build 4 memory fabs plus $52B for the central regions, totaling $550B ( TechCrunch ). This isn't just about filling upstream capacity — the key is that Samsung + SK Hynix are trying to flip themselves from being NVIDIA's downstream suppliers into becoming the dominant players in AI hardware. Why did downstream hardware investment kick off so late? Because for the past two years people were still watching and waiting to see if "this AI hype cycle would cool down again." By 2026, GPT-6, Claude 4, and Gemini 3 are all live, inference costs have come down, user numbe

2026-07-04 原文 →
AI 资讯

Why MLCC Lead Times Are Blowing Up in 2026 (And How to Design Around It)

If you've submitted a BOM for quoting recently and gotten a lead time that made you do a double take, you're not imagining things. Passive component sourcing in 2026 is tighter than it's been in a few years — and MLCCs are the epicenter. I want to break down why this is happening, which component categories are actually at risk, and — more importantly — what you can do at the design stage to make your board less vulnerable to it. This isn't a "just wait it out" post; there are concrete layout and BOM decisions that meaningfully change your exposure. Why now? Three demand sources are converging on the same MLCC/inductor capacity that used to be dominated by consumer electronics: AI server infrastructure — GPU power delivery networks alone can chew through hundreds of decoupling capacitors per board, and hyperscaler order volumes dwarf typical consumer runs. EVs — automotive-grade passives (AEC-Q200, X8R/X7R) come from a narrower qualified supplier base, so even modest EV growth disproportionately tightens that segment. Renewables/grid infrastructure — pulling on high-voltage inductors and power resistors. On the supply side, new MLCC/ferrite production lines take 12–24 months to come online from the capital decision. Semiconductor fabs can reallocate capacity relatively fast; passive component fabs can't. That structural lag is the real reason lead times stretch out faster than they recover. Which parts are actually at risk Not everything is equally exposed: Category Normal LT 2026 Tight-Market LT Exposure Commercial MLCC (X7R, 0402/0603) 4–8 wks 8–16 wks Moderate–High High-density MLCC (0201, high µF) 6–10 wks 16–26 wks High Automotive MLCC (AEC-Q200, X8R) 10–14 wks 20–30+ wks Very High C0G/NP0 (precision/timing) 4–8 wks 6–12 wks Low–Moderate Power inductors (shielded, low DCR) 6–10 wks 12–20 wks Moderate–High Chip resistors 2–6 wks 4–8 wks Low Chip resistors are the least affected — manufacturing capacity is less concentrated and swapping vendors doesn't trigger a

2026-07-01 原文 →
AI 资讯

Memory Chips

Memory Chips Supply chain strategy from electronics production engineering, 500–50k units/year Introduction "Order from Digi-Key" is a prototyping strategy, not a production strategy. The 2020–2023 IC shortage demonstrated that supply chain resilience must be designed in — not improvised when lead times hit 52 weeks. The Sourcing Tier Structure Tier Examples MOQ Price Premium Lead Time Risk Authorized dist. Digi-Key, Mouser, Newark 1 pc +25–40% 1–3 days (stock) Lowest Franchise dist. Arrow, Avnet, TTI 100–1k Baseline 2–8 weeks Low Manufacturer direct TI, Infineon, ST portals 1k–10k+ −10 to −30% 8–20 weeks Low Regional aggregators IC-Online, local dist. Mixed Variable Variable Medium Spot market Brokers, eBay 1 pc +50 to +500% Days High Never use spot market for ICs without incoming inspection. Counterfeit STM32, ESP32, and common analog ICs are well-documented. Volume Pricing Reality Illustrative for a $2.50 MCU: Volume Digi-Key Arrow/Avnet Manufacturer Direct 100 $3.10 $2.65 N/A 1,000 $2.75 $2.15 $1.85 10,000 $2.40 $1.70 $1.25 50,000 $2.10 $1.40 $0.90 The franchise/direct savings are material at 1k+ units. Establishing Arrow or Avnet relationships pays for the admin overhead within 2 production cycles. BOM Resilience Framework For each critical component, document: Primary source : authorized distribution or direct Secondary distributor : alternative channel for same part Alternate part : functionally equivalent, different manufacturer, validated Buffer stock : target weeks at production rate Lead time worst-case : historical peak, not current During normal periods: 4-week buffer, one secondary source, one qualified alternate. For 5+ year product lifecycles: qualify the alternate before you need it. Practical Sourcing Mix: 500–5k Units/Year Component Type Primary Secondary Notes Commodity passives Digi-Key/Mouser + Yageo/Walsin Arrow Annual pricing agreements MCUs < $3 Arrow direct IC-Online for gap fills 90-day POs, buffer stock MCUs $3–$10 Manufacturer direct + A

2026-07-01 原文 →
AI 资讯

The First Visible LED Glowed Red

Look at almost any piece of electronics on your desk and you will find a small light staring back at you. A router with a row of blinking status lights. A power brick with a steady green dot. A development board with a tiny red point that flickers every time it does something. We barely notice these lights anymore, but each one descends from a single laboratory breakthrough in 1962, when an engineer at General Electric coaxed a sliver of semiconductor into glowing visible red for the first time. Who invented the first visible LED The engineer was Nick Holonyak Jr., a consulting scientist at General Electric's lab in Syracuse, New York, and a former student of John Bardeen, one of the inventors of the transistor. On October 9, 1962, Holonyak demonstrated the first practical visible-spectrum light-emitting diode. It emitted red light, and it worked at room temperature, which made it genuinely useful rather than a laboratory curiosity. What made his approach different was the material. Other researchers in the early 1960s were building diodes that emitted infrared light, which is invisible to the human eye. Holonyak gambled on a different alloy, gallium arsenide phosphide, and it paid off with the first light a person could actually see coming out of a semiconductor. He was so confident in the idea that he predicted LEDs would one day replace the incandescent bulb. At the time that sounded outlandish. Today it is simply how lighting works. Why a tiny red light mattered so much The incandescent bulb that Thomas Edison commercialized makes light by heating a filament until it glows. That is wildly inefficient, because most of the energy escapes as heat rather than light, and the filament eventually burns out. An LED works on a completely different principle. When current flows across a specially engineered semiconductor junction, electrons release their energy directly as photons. There is no filament to burn out, almost no wasted heat, and the device can switch on and o

2026-06-30 原文 →